PIFREQ: Pulse Input/Frequency [FC103]



Specifications

Spec Description
S1Expander bus slave address of IMDSM04
S2Selected channel (1-8)
S3
Pulse trigger transition:
0 = low to high
1 = high to low
S4Frequency range expected
S5Gain
S6High alarm
S7Low alarm
S8Spare


Outputs

Block Type Description
N Real Frequency (Hz) multiplied by gain
N+1 Bit Frequency high alarm
N+2 Bit Frequency low alarm
N+3 Bit Slave communication status